Now Playing
AMD EPYC Venice Sold Out & the CPU Bottleneck Reshaping AI Data Centres
Audio is available on Spreaker — see link below.
AMD's EPYC Venice is fully allocated through 2027, and agentic AI is quietly making CPUs — not GPUs — the binding constraint in next-generation data centres. Today's briefing unpacks the supply crisis, TSMC N2 competition, Samsung's HBM capacity squeeze, and what Intel's cash burn really signals.
Audio is available on Spreaker — see link below.
All of AMD's EPYC Venice production through 2027 is gone. Every unit.
Here's what the research is now quantifying. Work out of Georgia Tech and Intel puts CPU-side orchestration at somewhere between fifty and ninety percent of end-to-end latency in agentic systems.
AMD's Venice is the chip that was supposed to relieve that pressure. It's the first high-performance computing product in volume production on TSMC's N2 nanosheet process.
The memory side of this story deserves attention too. Samsung has confirmed that HBM will rise to thirty percent of its DRAM fab capacity by twenty-twenty-seven, up from twenty percent now.
One piece of new capacity is now online. VIS has opened Singapore's first three-hundred-millimetre fab, built with TSMC-licensed interposer technology.
The through-line across all of this is that AI infrastructure constraints have shifted. GPU allocation was the defining bottleneck of twenty-twenty-three and twenty-twenty-four.
Chapter summary auto-generated from the verified script. Listen to the full episode for the complete content.