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CoWoS at 260K, EMIB-T & Broadcom's $230B AI Forecast
Audio is available on Spreaker — see link below.
Advanced packaging is now the binding constraint on AI chip shipments — TSMC targets 260K monthly CoWoS wafers, Intel EMIB-T wins Google TPU capacity, and Broadcom forecasts $230B in AI semiconductor revenue by 2028. Today's briefing covers the packaging bottleneck, Apple A20 Pro's 2nm confirmation, and a structural shift in TSMC's customer mix.
Audio is available on Spreaker — see link below.
Advanced packaging is now the binding constraint on AI chip shipments. Not transistor density.
TSMC has officially confirmed it will move to fourteen-times-reticle CoWoS production in twenty twenty-eight. That's a package integrating roughly ten compute dies and twenty HBM stacks in a single unit.
The packaging crunch is opening a door for Intel. Intel's EMIB-T technology, a competing approach to high-bandwidth chiplet integration, is projected to reach forty thousand to forty-five thousand monthly equivalent wafers by twenty twenty-eight.
On the logic side, the iPhone eighteen Pro launch with the A20 Pro chip confirmed TSMC's two-nanometer process is commercially viable at volume. The A20 Pro runs dual sixteen-core Neural Engines, doubling AI processing versus the A19 Pro.
TSMC's revenue concentration is also shifting in a way that tells you something structural. Apple's share of TSMC revenue has dropped from twenty-five percent in twenty twenty-three to nineteen percent in twenty twenty-five.
Broadcom's numbers deserve attention, and some scrutiny. The company guided AI semiconductor revenue to fifty-eight billion in fiscal twenty twenty-six, one hundred fifteen billion in twenty twenty-seven, and two hundred thirty billion in twenty twenty-eight.
The two metrics worth tracking over the next twelve months are CoWoS capacity delivery against the twenty twenty-eight target, and whether Intel's EMIB-T qualifications convert into real volume at scale. Intel's foundry track record on hitting capacity commitments is uneven.
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