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TSMC's A14 Node, Terafab JV & the Financing Gap Behind the Supercycle
Audio is available on Spreaker — see link below.
TSMC raises 2026 capex guidance to $64B and accelerates its 3nm and 2nm ramps, while Intel pivots with a SpaceX-Tesla Terafab joint venture for custom silicon. The real risk: a $638B commitment backlog with only 12% near-term deployment conversion.
Audio is available on Spreaker — see link below.
TSMC just raised its 2026 capital expenditure guidance to sixty to sixty-four billion dollars, and that's not the ceiling. Projections extend to seventy-seven billion in twenty-twenty-seven and eighty-six billion by twenty-twenty-eight.
On the production side, TSMC has pulled forward its three-nanometer ramp by three to four months. The new target is one hundred eighty thousand wafer starts per month by early Q4 of twenty-twenty-six, up from one hundred fifty thousand in the first half of the year.
The cost engineering story is where TSMC's structural advantage becomes clearest. Their A14 node, at one point four nanometers, is being designed to avoid High-NA EUV lithography tools entirely.
Intel's response to all of this is instructive. The company announced a joint venture with SpaceX and Tesla called Terafab, targeting a custom semiconductor fab in Texas focused on robotics and autonomous vehicle chips.
TSMC's Kumamoto fab in Japan is also expanding beyond its original twenty-eight and twenty-two nanometer mandate. The site is now adding three-nanometer fabrication and advanced packaging capabilities.
The risk thread running through all of this is financing. Oracle's free cash flow swung to negative twenty-four billion dollars in fiscal twenty-twenty-six while its remaining performance obligations reached six hundred thirty-eight billion.
Two things to track closely from here. First, whether TSMC's three-nanometer yield at Kumamoto confirms the schedule it hasn't formally disclosed yet.
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